Re: [PATCH] pwm: mediatek: always use bus clock for PWM on MT7622

[Uwe Kleine-König]

On Fri, Oct 28, 2022 at 10:39:31AM +0200, AngeloGioacchino Del Regno wrote:
> Il 26/10/22 02:56, Daniel Golle ha scritto:
> > According to MT7622 Reference Manual for Development Board v1.0 the PWM
> > unit found in the MT7622 SoC also comes with the PWM_CK_26M_SEL register
> > at offset 0x210 just like other modern MediaTek ARM64 SoCs.
> > And also MT7622 sets that register to 0x00000001 on reset which is
> > described as 'Select 26M fix CLK as BCLK' in the datasheet.
> > Hence set has_ck_26m_sel to true also for MT7622 which results in the
> > driver writing 0 to the PWM_CK_26M_SEL register which is described as
> > 'Select bus CLK as BCLK'.
> > 
> > Fixes: 0c0ead76235db0 ("pwm: mediatek: Always use bus clock")
> > Signed-off-by: Daniel Golle <daniel@xxxxxxxxxxxxxx>
> 
> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxx>

Acked-by: Uwe Kleine-König <u.kleine-koenig@xxxxxxxxxxxxxx>

Best regards
Uwe

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Pengutronix e.K.                           | Uwe Kleine-König            |
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