Re: [PATCH v4 1/2] dt-bindings: clock: Add QDU1000 and QRU1000 GCC clocks
From: Krzysztof Kozlowski
Date: Sun Nov 20 2022 - 06:07:05 EST
On 18/11/2022 19:18, Melody Olvera wrote:
> Add device tree bindings for global clock controller on QDU1000 and
> QRU1000 SoCs.
>
> Signed-off-by: Melody Olvera <quic_molvera@xxxxxxxxxxx>
> ---
> .../bindings/clock/qcom,gcc-qdu1000.yaml | 70 ++++++++
> include/dt-bindings/clock/qcom,gcc-qdu1000.h | 170 ++++++++++++++++++
> 2 files changed, 240 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-qdu1000.yaml
> create mode 100644 include/dt-bindings/clock/qcom,gcc-qdu1000.h
>
> diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-qdu1000.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-qdu1000.yaml
> new file mode 100644
> index 000000000000..90935a6795ee
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-qdu1000.yaml
> @@ -0,0 +1,70 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/qcom,gcc-qdu1000.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm Global Clock & Reset Controller for QDU1000 and QRU1000
> +
> +allOf:
> + - $ref: qcom,gcc.yaml#
> +
> +maintainers:
> + - Melody Olvera <quic_molvera@xxxxxxxxxxx>
> +
> +description: |
> + Qualcomm global clock control module which supports the clocks, resets and
> + power domains on QDU1000 and QRU1000
Keep the same style as existing files. They were cleaned up recently.
> +
> + See also:
> + - include/dt-bindings/clock/qcom,gcc-qdu1000.h
Keep the same style, so missing '::', drop '- '.
> +
> +properties:
> + compatible:
> + items:
> + - const: qcom,gcc-qdu1000
SM8550 is coming with proper style of compatible, so let's do the same
also here: qcom,qdu1000-gcc
(and file name matching it)
> + - const: syscon
I don't see usage of it as syscon. Which parts of GCC are needed for whom?
> +
> + clocks:
> + items:
> + - description: Board XO source
> + - description: Sleep clock source
> + - description: PCIE 0 Pipe clock source
> + - description: PCIE 0 Phy Auxiliary clock source
> + - description: USB3 Phy wrapper pipe clock source
> + minItems: 2
Same question as for SM8550 - why inputs are flexible? Either you have
these or you do not.
> +
> + '#clock-cells':
> + const: 1
> +
> + '#reset-cells':
> + const: 1
> +
> + '#power-domain-cells':
> + const: 1
Missing ref to gcc.yaml. Drop all properties provided by gcc.yaml.
> +
> + reg:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - '#clock-cells'
> + - '#reset-cells'
Drop these required by gcc.yaml.
Best regards,
Krzysztof