[PATCH 1/2] dt-bindings: timer: add a binding for LiteX Timer

[Icenowy Zheng]

The LiteX SoC generator has a timer core, which by default only
generates a simple down counter.

Add a DT binding for it.

Signed-off-by: Icenowy Zheng <uwu@xxxxxxxxxx>
---
 .../bindings/timer/litex,timer.yaml           | 52 +++++++++++++++++++
 1 file changed, 52 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/timer/litex,timer.yaml

diff --git a/Documentation/devicetree/bindings/timer/litex,timer.yaml b/Documentation/devicetree/bindings/timer/litex,timer.yaml
new file mode 100644
index 000000000000..bece07586c6b
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/litex,timer.yaml
@@ -0,0 +1,52 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/timer/litex,timer.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: LiteX Timer
+
+maintainers:
+  - Icenowy Zheng <uwu@xxxxxxxxxx>
+
+description: |
+  The LiteX Timer is a count-down timer that is defaultly embedded
+  into all LiteX SoCs, unless explicitly disabled. It's fed directly
+  by the system clock like other LiteX peripherals.
+
+properties:
+  compatible:
+    const: litex,timer
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+  litex,width:
+    description:
+      The width of the timer's value, specified as the width argument
+      when creating an instance of litex.soc.cores.Timer.
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clocks
+  - litex,width
+
+additionalProperties: false
+
+examples:
+  - |
+     timer@a0006000 {
+        compatible = "litex,timer";
+        reg = <0xa0006000 0x20>;
+        clocks = <&sys_clk>;
+        interrupts = <17>;
+        litex,width = <32>;
+     };
-- 
2.37.1