+static void do_exc_hv(struct pt_regs *regs)
+{
+ union hv_pending_events pending_events;
+ u8 vector;
+
+ while (sev_hv_pending()) {
+ asm volatile("cli" : : : "memory");
+
Do we really need to disable interrupts here, #HV exception will be dispatched via an interrupt gate in the IDT, so interrupts should be implicitly disabled, right ?panic("Unexpected vector %d\n", vector);
+ unreachable();
+ }
+ } else {
+ common_interrupt(regs, pending_events.vector);
+ }
+
+ asm volatile("sti" : : : "memory");
Again, why do we need to re-enable interrupts here (in this loop), interrupts will get re-enabled in the irqentry_exit() code path ?